Simplest RT kernel, single repetitive instruction tests a specific condition. No scheduling or communication because only a single task. Excellent for high-speed channels

Hardware signal initiates event, when receiving interrupt the processor completes the instruction, saves the program counter so it can return to where it was, loads the one where it has the code to handle the interrupt, executes it then turns back

In practice, several interrupts can be handled in priority fashion, highest first

• Many tasks with one processor
• Each task its own context
• Tasks may interact to execute as a whole program

When the CPU switches tasks it is said to have switched contexts. It must save the minimum neededd to restore the old process, and during switching interrupts are disabled. Most systems have very fast context switching.